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| Yesterday, Patrick Gelsinger has talked about quite a few things that Intel has in the 'oven' and that includes the 2 billion transistor Tukwila, 6-core Dunnington, Nehalem, Sandy Bridge and even Larabee. Although all are interesting we're going to stop and stare at Nehalem, the 'tock' stage of the 45nm process, a new architecture. Set to arrive as son as Q4, the Nehalem processors will go from 2 to 8 cores and, courtesy of SMT (simultaneous multi-threading) have 4 to 16 threads. More changes in Nehalem include the QuickPath Interconnect aka the memory controller which will enable support for DDR3-800, 1066 and 1333 memory, shared L3 cache (8 MB on the 4-core chip), SSE 4.2 and a few other pluses. Since words are overrated though just take a look below at the official Intel slides detailing Nehalem to maybe get a better understanding of what we'll be getting before the end of the year.      |
