http://www.forbes.com/technology/fee...938380688.html
Quote:
| A new way of making silicon processors will boost performance by up to 24 per cent for a given power drain - or give the same performance using less power, according to joint developers IBM and AMD. The basis of the technique has been known for some time: that you can ease current flow in the transistors by 'straining' semiconductors like germanium or silicon so that their molecules are infinitesimally further apart - or (depending the polarity of the transistor) closer together. Most work has been done on strained silicon, but the performance is much better with germanium. The new technique uses strained germanium to form the tiny conducting channel within each transistor that is switched on and off by the gate voltage. The bulk of the device is still silicon based and the major breakthrough lies in the ability to make the new transistors using well-established Cmos manufacturing processes. IBM says the technique will be practicable with feature sizes as low as down to 32nanometres - compared with 90nm on today's mainstream fast processors. The massive performance increases of the past few years have been largely due to miniaturisation; but IBM fellow TC Chen said: 'Chip performance will increasingly depend on new materials and design techniques rather than simple scaling.' Strained germanium will be combined with another IBM-pioneered technology called Silicon-on-Insulator, which reduces leakage current and performance-reducing capacitance. Dirk Meyer, executive vice-president of AMD's Computation Products Group, said AMD already delivers the best performance per watt on today's processors and the new technique would extend that leadership. It will be introduced into all AMD's 90nm processors; first 90nm AMD64 processors using it will ship in the first half of the year. |
